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BU-65142 and BUS-65142 SERIES
MIL-STD-1553 DUAL REDUNDANT REMOTE TERMINAL HYBRID
DESCRIPTION
The BUS-65142 Series is a complete dual redundant MIL-STD1553 Remote Terminal Unit (RTU) packaged in a small 1.9" x 2.1" hybrid. The device is based upon two DDC custom ICs, which includes two monolithic bi-polar low power transceivers and one CMOS protocol containing data buffers and timing control logic. It supports all 13 mode codes for dual redundant operation, any combinaion of which can be illegalized. Parallel data transfers are accomplished with a DMA type handshaking, compatible with most CPU types. Data transfers to/from memory are simplified by the latched command word and word count outputs. Error detection and recovery are enhanced by BUS-65142 Series special features. A 14-bit built-intest word register stores RTU information, and sends it to the Bus Controller in response to the Mode Command Transmit Bit Word. The BUS-65142 Series performs continuous on-line wraparound self-test, and provides four error flags to the host CPU. Inputs are provided for host CPU control of 6 bits of the RTU Status Word. Its small hermetic package, -55C to +125C operating temperature range, and complete RTU operation make the BUS-65142 ideal for most MIL-STD-1553 applications requiring hardware or microprocessor subsystems.
FEATURES
* Complete Intergrated Remote
Terminal Including: -Dual Low-Power Transceivers -Complete RT Protocol
* Direct Interface to Systems With
No Processor
* Radiation Tolerant Version
Available
* Space Qualified Version
Available
* High Reliability Screening
Available
DATA BUS A
TRANSCEIVER
ENCODER/ DECODER
BIT PROCESSOR
BUFFER
DB0-DB15 BUF ENA DTREQ DTGRT DTACK DTSTR R/W
WATCHDOG TIMEOUT
TRANSFER CONTROLS
DATA BUS B
TRANSCEIVER
ENCODER/ DECODER
BIT PROCESSOR
CURRENT WORD COUNTER PROTOCOL SEQUENCER AND CONTROL LOGIC
M U X
A0-A4 A5-A10 DAT/CMD ILL CMD (ME) SS REQ ADBC RT FLAG SS BUSY SS FLAG MESS ERR RT FAIL HS FAIL RTADD ERR NBGT INCMD BITEN STATEN GBR
COMMAND LATCH
RT ADDRESS + PARITY
STATUS REGISTER
16 MHz CLOCK
ERROR FLAGS
TIMING FLAGS
DDC CUSTOM CHIP
FIGURE 1. BUS-65142 SERIES BLOCK DIAGRAM (c) 1988, 1999 Data Device Corporation
TABLE 1. BU-65142 and BUS-65142/44 SPECIFICATIONS PARAMETER RECEIVER Differential Input Impedance (DC to 1 MHz) Differential Input Voltage Input Threshold Level (Direct Coupled) CMRR (DC to 2 MHz) CMV (DC to 2 MHz) TRANSMITTER Differential Output Voltage ! Direct Coupled Across 35 , Measured on Bus ! Transformer Coupled Across 70 , Measured on Stub: Output Noise, Differential (Direct Coupled) Output Offset Voltage, (Transformer Coupled Across 70 ohms) Rise/Fall Time LOGIC VIH VIL IIH (VIH=2.7V)
! BRO ENA, ADDRE-ADDRA(RTAD4-RTAD0), ADDRP (connect to 30k pull-up ) ! (VIH=2.7V) DB15 - DB0
TABLE 1. BU-65142 and BUS-65142/44 SPECIFICATIONS (continued) UNITS kohm PARAMETER LOGIC (continued) VOH ! (IOH=-2mA) DB15 - DB0 (connect to a 45k pull-up ) C1 (f = 1 MHz) C0 (f = 1 MHz) CI0 ((f = 1 MHz)
! DB15 - DB0
MIN 4.0
TYP
MAX
MIN
TYP
MAX
UNITS
40 0.70 40 10 1.20
Vp-p Vp-p dB V
0.4
V
50 10 50
pF pF pF
6 18
7 21
9 27 10
Vp-p Vp-p mVp-p, diff mVp-p, diff nsec V
(connect to a 45k pull-up ) POWER SUPPLY REQUIREMENTS +5V (BU-65142X1/2, BUS-65142/43/44/45) Current Drain -15V (BU-65142X1, BUS-65142/44) Current Drain * Idle * 25% Transmitter Duty Cycle * 50% Transmitter Duty Cycle * 100% Transmitter Duty Cycle -12V (BU-65142X2, BUS-65143/45) Current Drain * Idle * 25% Transmitter Duty Cycle * 50% Transmitter Duty Cycle * 100% Transmitter Duty Cycle POWER DISSIPATION (See Note) Total Hybrid ! BU-65142X1/BUS-65142/44 * Idle * 25% Transmitter Duty Cycle * 50% Transmitter Duty Cycle * 100% Transmitter Duty Cycle ! BU-65142X2/BUS-65143/45 * Idle * 25% Transmitter Duty Cycle * 50% Transmitter Duty Cycle * 100% Transmitter Duty Cycle Hottest Die ! BU-65142X1/BUS-65142/44 * Idle * 25% Transmitter Duty Cycle * 50% Transmitter Duty Cycle * 100% Transmitter Duty Cycle
! BU-65142X2/BUS-65143/45
4.5 50 -15.75 30 68 105 180 -12.6 30 80 130 230
5.5 115 -14.25 60 108 160 255 -11.4 60 120 185 305
V mA V mA mA mA mA V mA mA mA mA
-250 100 2.4 150
+250 300
0.7 0.04 0.2
V mA
0.04
0.2 20
mA A
(connect to a 45k pull-up )
! (VIH2.4V) All Other Inputs
IIL (VIL=0.4V) ! BRO ENA, ADDRE-ADDRA(RTAD4-RTAD0), ADDRP (connect to 30k pull-up ) ! (VIL=0.4V) DB15 - DB0 (connect to a 45k pull-up ) ! (VIL=0.7V) All Other Inputs--VOH
!(IOH=-0.4mA) A9-A5(SA4-SA0), RTADERR, HSFAIL, DAT/CMD, RTFAIL, BITEN, NBGT, GBR, ME, STATEN
0.4
mA
0.700 0.912 1.125 1.550 0.610 0.860 1.110 1.160
1.475 1.856 2.238 3.000 1.295 1.680 2.065 2.895
W W W W W W W W
0.4 20
mA A
2.4
V
0.335 0.550 0.760 1.185 0.290 0.540 0.790 1.290
0.680 1.010 1.350 2.030 0.590 0.870 1.260 1.960
W W W W W W W W
VOH
! (IOH=-0.4mA) All Other Inputs---
2.4
V
VOH
! (IOH=-0.4mA) DB15 - DB0
* * * *
Idle 25% Transmitter Duty Cycle 50% Transmitter Duty Cycle 100% Transmitter Duty Cycle
2.4
V
(connect to a 45k pull-up ) VOL
!(IOH=-2mA) A9-A5(SA4-SA0), RTADERR, HSFAIL, DAT/CMD, RTFAIL, BITEN, NBGT, GBR, ME, STATEN
0.4
V
VOH
!(IOL=2 mA) All Other Inputs---
0.4
V
2
TABLE 1. BU-65142 and BUS-65142/44 SPECIFICATIONS (continued) THERMAL 20 C/W * Thermal Resistance, Junction-toCase, Hottest Die (JC) -55 150 C * Operating Junction Temperature -65 150 C * Storage Temperature +300 C * Lead Temperature (soldering, 10 sec.) PHYSICAL CHARACTERISTICS Size 78-pin Kovar (BUS-65142/43) 82-pin Kovar Flat Pack (BUS-65142/43) 78-pin Ceramic QIP (BU-65142D)
INTRODUCTION
The BUS-65142 is a complete dual redundant Remote Terminal Unit (RTU) packaged in a small 1.9 x 2.1 hybrid. It is fully compliant with MIL-STD=1553B and supports all message formats. As shown in FIGURE 1, it includes 2 transceivers and a custom chip containing 2 encoders, 2 bit processors, an RTU protocol sequencer and control logic, output latches, and buffers. With the addition of 2 data bus transformers, the BUS-65142 is ready for connection to a MIL-STD-1553 data bus. Data is transferred to and from the subsystem host CPU over a 16-bit parallel highway, which is isolated by a set of bi-directional buffers. All transfers are made with a DMA type handshake sequence of request, grant and acknowledge. Read/write and data strobes are provided to simplify interfacing to external RAM. Also simplifying the RAM interface is the availability of latched command word and auto-incrementing word counter. These signals may be used as an address to map the data directly to and from RAM. The BUS-65142 allows the subsystem host CPU to control 6 of the bits in the RTU status word. Of particular interest is the Illegal Command input which may be used to set the message error bit and illegalize any command word. The BUS-65142 provides four error flags to the subsystem host CPU for evaluating its condition. In addition a continuous on-line self-test is performed by the BUS-65142 on every transmission. The last Transmitted Word of every message is wrapped around the decoder and compared with the Actual Word. Any discrepancy is flagged as an error.
1.87 x 2.10 x 0.25 (47.5 x 53.3 x 6.4) 1.61 x 2.20 x 0.181 (40.8 x 55.8 x 4.6) 1.80 x 2.10 x 0.21 (45.7 x 53.3 x 5.3) 1.80 x 2.10 x 0.21 (45.7 x 53.3 x 5.3)
in (mm) in (mm) in (mm) in (mm)
78-pin Ceramic Flat Pack (BU-65142F)
Weight Note:
1.7 (4.1)
oz (g)
Power dissipation specifications assume a transformer coupled configuration, with external disipation (while transmitting) of 0.14 watts for the active isolation transformer, 0.8 watts for the active coupling transformer, 0.45 watts for each of the two bus isolation resistors, and 0.15 watts for each of the two bus termination resistors.
TIMING
TABLE 2. BU-65142 SERIES RADIATION SPECIFICATIONS PART NUMBER TOTAL DOSE SINGLE EVENT UPSET SINGLE EVENT LATCHUP
BU-65142 X1/X2
300K Rad
5.3 x 10-6 errors/device-day, (LET Threshold of 59 MeV/mg/cm2)
Immune
Interfacing the subsystem host CPU to the BUS-65142 is simple and compatible with most microprocessors. FIGURE 3 and 4 illustrate typical MIL-STD-1553 messages for Transmit data and Receive data. FIGURES 5 and 6 illustrate RT to RT transfers. In each case NBGT identifies the start of the message, and INCMD identifies that a command is being processed. The handshake sequence DTREQ, DTGRT, and DTACK is used to transfeer each word over the parallel data highway. DTSRB and RD / WR are used to control transfers to RAM memory. GBR identifies a "good block received", when a received message has passed all validation checks and has the correct word count. BUF ENA (Buffer Enable) must be applied to enable the internal tri-state buffers.
3
ERROR FLAGS
Four error flags are ouput to the subsystem to provide information on the condition of the BUS-65142. The ME (Message Error) line goes LOW if any of the following error conditions exist: format error word count error invalid word sync error RT to RT address error T/R bit error. The RTFAIL (Remote Terminal Failure) line goes LOW whenever the results of a continuous wraparound self-test shows a discrepancy, or a transmitter watchdog timeout has occurred. The HSFAIL (Handshake Failure) line goes LOW whenever the system dows not issue a DTGRT in response to a
DTREQ before timing-out.
STATUS REGISTER
Six inputs to the BUS-65142 allow the subsystem host CPU to control bits in the RTU status word. The Illegal Command input may be used to set the Message Error bit in the Status Word and suppress the transmission of data to the bus controller. This line allows illegalization of any combination of commands. The latched Command Word may be connected to the address pins of an optional external PROM, which would drive the Illegal Command line LOW when it identifies a command programmed as illegal.
STATUS REGISTER BIT ASSIGNMENTS
The SRQ (Subsystem Request) line is used to set the Status Word service request bit. The ADBC (Accept Dynamic Bus Control) line is used to set the Status Word bus control bit. The RTFLAG (RT Flag Line) is used to set the Status Word terminal flag bit. The BUSY (Busy) line is used to set the Status Word busy bit, and inhibit subsystem requests for data. The SSFLAG (SubSystem Flag) line is used to set the Status Word subsytem (fault) flag.
The RTADR ERR (RT Address Error) line goes LOW whenever the sum of the 5 address lines and parity lines show a parity error (the terminal will not respond to commands while this error condition exists).
4
BUILT-IN-TEST
The BUS-65142 contains a 14-bit Built-In-Test (BIT) word register which stores information about the condition of the RTU. When a mode code is received to transmit the BIT word, the con-
tents of the BIT register is transmitted over the 1553 bus. FIGURE 2 shows the fault assigned to each bit in the BIT word. Conditions monitored are; transmitter timeouts, loop test failures, transmitter shutdown, subsystem handshake failure, and the results of individual message validations.
DATA SYNC
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
P
ALWAYS ZERO
{
CHANNEL A/B - TRANSMITTER TIMEOUT
CHANNEL B - TRANSMITTER TIMEOUT
HANDSHAKE FAILURE
CHANNEL A TRANSMITTER TIMEOUT
CHANNEL A/B - LOOP TEST FAILURE
CHANNEL B - LOOP TEST FAILURE
MODE CODE - T/R ERROR CODE { ILLEGAL OR RESERVED MODEWITH MODE CODE ILLEGAL USE OF BROADCAST MESSAGE SERVICING ABORTED DUE TO LOW WORD COUNT
CHANNEL A - LOOP TEST FAILURE
CHANNEL B - TRANSMITTER SHUTDOWN
CHANNEL A - TRANSMITTER SHUTDOWN
MESSAGE SERVICING ABORTED DUE TO HIGH WORD COUNT
NON-MODE BROADCAST COMMAND TO TRANSMIT
NOTES
1. BITS 3-7 ARE CLEARED IN THE BEGINNING OF EACH NEW MESSAGE AND UPDATED AT THE END OF THE MESSAGE. THEY ONLY REFLECT THE PRESENT COMMAND WORD. 2. BITS 0-2 AND 10-13 ARE LATCHED AND ONLY CLEARED BY A MODE RESET COMMAND OR A MASTER RESET (RESET). 3. BITS 8 AND 9 ARE SET ONLY BY THE MODE COMMAND FOR "TRANSMITTER SHUTDOWN" AND ARE CLEARED BY THE MODE COMMAND FOR "OVERRIDE TRANSMITTER SHUTDOWN" OR "RESET REMOTE TERMINAL". BITS 8 AND 9 ARE ALSO CLEARED BY RESET.
FIGURE 2. BUILT-IN-TEST (BIT) WORD REGISTER
5
10.5.5s 1553 BUS CMO 1514 13 12 1110 9 8 7 6 5 4 3 2 1 0 P
TRANSMIT 2 WORDS
STATUS 1514 13 12 1110 9 8 7 6 5 4 3 2 1 0 P
3.4.5s
1.1.2s
NBGT 100-150ns INCMD 825-925 200ns min DTGRT 300ns max DTACK R/W 100-150ns DTSRT A10(T/R BIT) DAT/CMD 450-550ns
PREVIOUS MESSAGE
DTREQ
2.1s max
9.35
100-150ns
50ns min
200-400ns A9-A5 A4-A0 D15-D0 100ns max STATEN 100ns max
PREVIOUS SUBADDRESS
COMMAND WORD SUBADDRESS FIELD
WORD COUNT
PREVIOUS WORD COUNT
note 7
COMMAND WORD COUNT = 00000 note 7 100ns max
BITEN
HS FAIL RT FAIL
100ns max
225-275ns 50ns min 475-550ns 825-925ns 2.2sec 4.8s A10-A0 ARE VALID (COMMAND WORD) DTGRT IS RECOGNIZED
100ns min 50ns min 475-550ns
NO MORE CONTINUOUS DATA ENCODER STARTED UP
COMMAND WORD TRANSFER TO SUBSYSTEM START OF NEW STATUS INPUTS COMMAND WORD STROBED IN INITIALIZATION SRQ BUSY ILLCMD STROBED IN SSFLAG A4-A0 0(CURRENT ADBC WORD COUNTER) RTFLAG RTU REQUESTS DATA 250ns min Setup time BUS FOR COMMAND HOLD TIME 600ns min WORD TRANSFER
STATUS WORD TRANSFERRED TO ENCODER REGISTERS
ENCODER REGISTERS AVIALABLE FOR NEXT WORD RTU REQUESTS DATA BUS FOR 1st DATA WORD TRANSFER (RTFAIL IS CLEARED IF IT WAS SET)
FIGURE 3. TRANSMIT TIMING DIAGRAM
6
DATA 1514 13 12 1110 9 8 7 6 5 4 3 2 1 0 P DATA 15 14 1312 1110 9 8 7 6 5 4 3 2 1 0 P
4.7.3 max 1.1.2s
~~ ~~
~ ~
200ns min
9.35s max
200ns min
max
100-150ns
100-150ns
~ ~~ ~ ~ ~ ~ ~~ ~ ~ ~
CURRENT WORD COUNT = 00001 note 7
CURRENT WORD COUNT = 00010
note 7
100ns max
100ns max
~ ~
50ns min 225-275ns 475-550ns INTERNAL DATA BUFFERS ARE NOW INPUTS
225-275ns 50ns min 475-550ns INTERNAL DATA BUFFERS ARE NOW INPUTS SUBSYSTEM DATA MUST BE VALID 2nd DATA WORD TRANSFER DTGRT IS RECOGNIZED DATA TRANSFER STARTS, SUBSYSTEM SHOULD BE DRIVING THE DATA BUS
SUBSYSTEM DATA MUST BE VALID 1st DATA WORD TRANSFER
DTGRT IS RECOGNIZED DATA TRANSFER STARTS, SUBSYSTEM SHOULD BE DRIVING THE DATA BUS
ENCODER REGISTERS AVAILABLE FOR NEXT WORD RTU REQUESTS DATA BUS FOR 2nd DATA WORD TRANSFER
NOTES
1. LEGEND DON'T CARE DATA BUS UNDEFINED 2. EACH WORD IS DRIVEN FOR 18-19S ON D15-D05. IF BUF ENA IS ACTIVE THE LAST WORD IS AVAILABLE FOR 3.5-4S SINCE THE STATUS WORD MUST BE SUPPORTED. 3. DATA BUS IS SHOWN WITH BUF ENA CONNECTED TO DTACK (SEE PIN FUNCTION TABLE, PIN 67) 4. THE POSITION OF DTACK WILL VARY DEPENDING ON WHEN DTGRT IS ISSUED; THE TIME WILL BE 100nS MIN to 150ns MAX FROM DTGRT. 5. HSFAIL IS ASSERTED UPON EXCESS DTGRT RESPONSE TIME. INCMD WILL SUBSEQUENTLY GO LOW, AND NO FURTHER DATA TRANSFERS WILL OCCUR. 6. RTFAIL IS CLEARED WHEN THE STATUS WORD IS TRANSMITTED. ONCE SET, FLAG WILL REMAIN SET FOR THE ENTIRE MESSAGE. THE INCMD FALLING EDGE CAN BE USED TO LATCH RTFAIL STATUS. 7. 100nS MIN REPRESENTS SETUP TIME FOR VALID DATA BEFORE DTSTR GOES LOW FOR A WRITE CYCLE. A READ CYCLE REQUIRES VALID DATA 160 nS MAX AFTER DTACK GOES LOW
7
~~ ~~
~~ ~~
~ ~
~ ~~ ~~ ~ ~ ~~ ~~ ~
~~~~~ ~~~~~
~~~~~ ~~~~~
300ns max
300ns max
~ ~
~~ ~~
RECEIVE 2 WORDS
1553 BUS CMD 151413121110 9 8 7 6 5 4 3 2 1 0 P DATA 151413 12 1110 9 8 7 6 5 4 3 2 1 0 P DATA 15141312 1110 9 8 7 6 5 4 3 2 1 0 P
10.5 5s
3.4 5s
3.5 5s
3.4 5s
NBGT 100-150ns INCMD DTREQ DTGRT DTACK 2.1s max 100-150ns 450-550ns
PREVIOUS MESSAGE
825-925ns 200ns min 300ns max
~~~ ~~~
200ns min 300ns max 2.85s max
DTSTR A10 (T/R BIT) DAT/CMD
50ns min
100-150ns
~~ ~~
R/W
~ ~
100-150ns
A9-A5 A4-A0 D15-D0
PREV SUB 200-400ns
PREVIOUS WORD COUNT WORD COUNT
COMMAND WORD SUBADDRESS FIELD
CURRENT WORD COUNT = 00000 note 7 100ns max 100ns max note 7 100ns max
STATEN GBR BITEN ME 100ns max HS FAIL RTFAIL 225-275ns 50ns min 475-550ns 825-925ns A10-A0 ARE VALID (COMMAND WORD) START OF NEW COMMAND WORD INITIALIZATION
100ns max
~ ~ ~ ~ ~ ~ ~ ~~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~~ ~ ~ ~
~~ ~~
225-275ns 50ns min RTU DATA VALID 1st DATA WORD IS RECEIVED & VAILDATED RTU REQUESTS DATA BUS FOR DATA WORD TRANSFER 475-550ns 1st DATA WORD TRANSFER DTGRT IS RECOGNIZED DATA TRANSFER STARTS
DTGRT IS RECOGNIZED
COMMAND WORD TRANSFER TO SUBSYSTEM STATUS INPUTS STROBED IN SRQ BUSY SSFLAG ADBC RTFLAG 250ns min Setup time HOLD TIME 600ns min
ILLCMD STROBED IN A4-A0 0 (CURRENT WORD COUNTER) RTU REQUESTS DATA BUS FOR COMMAND WORD TRANSFER
FIGURE 4. RECEIVE TIMING DIAGRAM
8
STATUS 1514 13 1211 10 9 8 7 6 5 4 3 2 1 0 P 4.7.3 max
1.1.2s
~ ~
~ ~
~ ~
~~ ~ ~~ ~
300ns max 2.85s max
~~ ~~
100-150ns
100-150ns
~~ ~~
~ ~ ~~ ~ ~ ~ ~~ ~
CURRENT WORD COUNT = 00001 note 7
CURRENT WORD COUNT = 00010 note 7 100ns max
~ ~
~ ~
~ ~
4.5s
225-275ns 50ns min
225-275ns 50ns min 475-550ns RT FAIL IS CLEARED IF IT WAS SET
RTU DATA VALID 2nd DATA WORD RECEIVED & VALIDATED RTU REQUESTS DATA BUS FOR DATA WORD TRANSFER 475-550ns 2nd DATAWORD TRANSFER DTGRT IS RECOGNIZED DATA TRANSFER STARTS
NOTES
1. LEGEND DON'T CARE DATA BUS UNDEFINED REPRESENTS THE SEQUENCE OF EVENTS IF THE COMMAND WAS BROADCAST. NOTE: NO STATUS WOULD BE TRANSMITTED ON1553 BUS. 2. EACH WORD IS DRIVEN FOR 18-19S ON D15-D0. IF BUF ENA IS ACTIVE THE LAST WORD IS AVAILABLE FOR 3.5-4S SINCE THE STATUS WORD MUST BE SUPPORTED. 3. DATA BUS IS SHOWN WITH BUF ENA CONNECTED TO DTACK (SEE PIN FUNCTION TABLE, PIN 67) 4. THE POSITION OF DTACK WILL VARY DEPENDING ON WHEN DTGRT IS ISSUED; THE TIME WILL BE 100NS MIN TO 150ns MAX FROM DTREQ 5. HSFAIL IS ASSERTED UPON EXCESS DTGRT RESPONSE TIME. GBR WILL NOT BE SET. 6. RTFAIL IS CLEARED WHEN THE STATUS WORD IS TRANSMITTED. ONCE SET, FLAG WILL REMAIN SET FOR THE ENTIRE MESSAGE. THE INCMD FALLING EDGE CAN BE USED TO LATCH RTFAIL STATUS. 7. 100nS MIN REPRESENTS SETUP TIME FOR VALID DATA BEFORE DTSTR GOES LOW.
STATUS WORD TRANSFERRED TO ENCODER REGISTERS NO MORE CONTINUOUS DATA ENCODER STARTED UP
9
~~ ~~
~~ ~~
~ ~
~ ~
~~ ~~
~~ ~~
~ ~
100ns max
~ ~ ~~ ~ ~ ~ ~~ ~
~~ ~~
~~ ~~
~~ ~ ~~ ~
200ns min
~ ~
~ ~
~ ~
TRANSMITTING RT RESPONSE TIME
RECIEVE COMMAND
TRANSMIT COMMAND
STATUS 151413121110 9 8 7 6 5 4 3 2 1 0 P DATA 151413 12 1110 9 8 7 6 5 4 3 2 1 3.5.5s 3.5.5s
1553 BUS CMD 151413121110 9 8 7 6 5 4 3 2 1 0 P DATA 151413 12 1110 9 8 7 6 5 4 3 2 1 0 P 3.4.5s
NBGT 100-150ns INCMD 2.1s max DTREQ DTGRT DTACK R/W 100-150ns DTSTR 50ns min (T/R BIT) DAT/CMD A9-A5 A4-A0
PREVIOUS SUBADDRESS PREVIOUS WORD COUNT WORD COUNT PREVIOUS MESSAGE
200ns min 300ns max
100-150ns
100-150ns
100-150ns
COMMAND WORD SUBADDRESS FIED CURRENT WORD COUNT = 00000
note 6 D15-D0 100ns max STATEN GBR BITEN ME HS FAIL RTFAIL 225-275ns 450-550ns 825-925ns A10-A0 ARE VALID (COMMAND WORD) START OF NEW COMMAND WORD INITIALIZATION 2.2sec DTGRT IS RECOGNIZED 475-550ns 50ns min
note 6
note 6
STATUS INPUTS STROBED IN SRQ BUSY COMMAND WORD SS FLAG TRANSFER TO ADBC SUBSYSTEM RT FLAG ILLCMD STROBED IN 250ns min Setup time A4-A0 0(CURRENT HOLD TIME 600ns min WORD COUNTER) RTU REQUESTS DATA BUS FOR COMMAND WORD TRANSFER
T/R BIT IS VERIFIED TRANSMITTING RT ADDRESS IS LATCHED
TRANSMITTING RT STATUS WORD ADDRESS IS CHECKED
1st DATA WORD IS RECIEVED & VALIDATED RTU REQUESTS DATA BUS FOR DATA WORD TRANSFER
FIGURE 5. RT TO RT (RECEIVE) TIMING DIAGRAM
10
10.5.5s 0 P DATA 151413121110 9 8 7 6 5 4 3 2 1 0 P 3.5.5s STATUS 151413121110 9 8 7 6 5 4 3 2 1 0 P 1.12s 4.7.3s
0P 2.85s max 200ns min 300ns max 2.85s max 200ns min 300ns max
225-275ns 100-150ns
225-275ns 100-150ns 100-150ns
CURRENT WORD COUNT = 00001
CURRENT WORD COUNT = 00010
note6 100ns max
note6
note6 100ns max 100ns max
4.5s
225-275ns 50ns min RTU DATA VALID 475-550ns 1st DATA WORD TRANSFER DTGRT IS RECOGNIZED DATA TRANSFER STARTS 2nd DATA WORD IS RECIEVED & VALIDATED RTU REQUESTS DATA BUS FOR DATA WORD TRANSFER
225-275ns
225-275ns 50ns min RTU DATA VALID 475-550ns
50ns min 475-550ns
RT FAIL IS CLEARED IF IT WAS SET
2nd DATA WORD TRANSFER DTGRT IS RECOGNIZED DATA TRANSFER STARTS
NOTES
STATUS WORD TRANSFER TO ENCODER REGISTERS NO MORE CONTINUOUS DATA ENCODER STARTED UP
1. LEGEND DON'T CARE DATA BUS UNDEFINED REPRESENTS THE SEQUENCE OF EVENTS IF THE COMMAND WAS BROADCAST. NOTE: NO STATUS WOULD BE TRANSMITTED ON1553 BUS. 2. EACH WORD IS DRIVEN FOR 18-19S ON D15-D0. IF BUF ENA IS ACTIVE THE LAST WORD IS AVAILABLE FOR 3.5-4S SINCE THE STATUS WORD MUST BE SUPPORTED. 3. DATA BUS IS SHOWN WITH BUF ENA CONNECTED TO DTACK (SEE PIN FUNCTION TABLE, PIN 67) 4. THE TIMING DIAGRAM REPRESENTS A DTGRT RESPONSE TIME OF 0.92S FOR COMMAND TRANSFER AND 2.1S FOR DATA. THE MAXIMUM RESPONSE TIME FROM DTREQ TO DTGRT TO GUARANTEE A SUCCESSFUL TRANSFER IS 1.5S FOR THE COMMAND TRANSFER AND 2.33S FOR DATA TRANSFER TO THE SUBSYSTEM. THE POSITION OF DTACK WILL VARY DEPENDING ON WHEN DGRT IS ISSUED 5. RTFAIL IS CLEARED WHEN THE STATUS WORD IS TRANSMITTED. ONCE SET, FLAG WILL REMAIN SET FOR THE ENTIRE MESSAGE. THE INCMD FALLING EDGE CAN BE USED TO LATCH RTFAIL STATUS. 6. 100nS MIN REPRESENTS SETUP TIME FOR VALID DATA BEFORE DTSTR GOES LOW.
11
RECIEVE COMMAND
TRANSMIT COMMAND
10.5.5s
TRANSMIT 2 WORDS
STATUS 151413121110 9 8 7 6 5 4 3 2 1 0 P
1553 BUS CMD 151413121110 9 8 7 6 5 4 3 2 1 0 P DATA 151413 12 1110 9 8 7 6 5 4 3 2 1 0 P
3.4.5s
1.1.2s
NBGT INCMD DTREQ DTGRT DTACK 2.1s max R/W 100-150ns DTSTR A10(T/R BIT) DAT/CMD A9-A5 A4-A0 PREVIOUS SUBADDRESS PREVIOUS WORD COUNT WORD COUNT note 6 D15-D0 100ns max STATEN GBR BITEN ME HS FAIL RTFAIL 450-550ns 225-275ns 50ns min 475-550ns 825-925ns 2.2sec 4.8s A10-A0 ARE VALID (COMMAND WORD) DTGRT is RECOGNIZED NO MORE CONTINUOUS DATA ENCODER STARTED UP ENCODER REGISTERS AVAILABLE FOR NEXT WORD RTU REQUESTS DATA BUS FOR 1st DATA WORD TRANSFER (RTFAIL IS CLEANED IF IT WAS SET) 475-550ns 225-275ns 50ns min 100ns max 100ns max note 6 COMMAND WORD SUBADDRESS FIELD COMMAND WORD COUNT 00000 PREVIOUS MESSAGE 200-400ns 50ns min 100-150ns 100-150ns 100-150ns
300ns max 9.35
note 6
COMMAND WORD TRANSFER TO SUBSYSTEM START OF NEW COMMAND WORD ILLCMD STROBED IN STATUS INPUTS A4-A0 0(CURRENT INITIALIZATION STROBED IN WORD COUNTER) SRQ RTU REQUESTS DATA BUSY BUS FOR COMMAND SS FLAG WORD TRANSFER ADBC RT FLAG 250ns min Setup time HOLD TIME 600ns min
STATUS WORD TRANSFERRED TO ENCODER REGISTERS
FIGURE 6. RT TO RT (TRANSMIT) TIMING DIAGRAM
12
4-12s RECEIVING AT RESPONSE TIME
DATA 151413121110 9 8 7 6 5 4 3 2 1 0 P DATA 151413 12 1110 9 8 7 6 5 4 3 2 1 0 P
STATUS 151413121110 9 8 7 6 5 4 3 2 1 0 P
1.1.2s
4.7.3s
300ns max s max
300ns max 9.35s max
100-150ns
100-150ns
CURRENT WORD COUNT=00001
CURRENT WORD COUNT=00010
note 6 100ns max
note 6 100ns max
225-275ns 475-550ns INTERNAL DATA SUFFERS ARE NOW INPUTS 50ns min
225-275ns 475-550ns INTERNAL DATA BUFFERS ARE NOW INPUTS 50ns min SUBSYSTEM DATA MUST BE VALID 2nd DATA WORD TRANSFER
SUBSYSTEM DATA MUST BE VALID
1st DATA WORD ENCODER REGISTERS TRANSFER AVAILABLE FOR NEXT DTGRT WORD RTU IS RECOGNIZED REQUESTS DATA BUS DATA TRANSFER FOR 2nd DATA WORD STARTS, SUBSYSTEM TRANSFER SHOULD BE DRIVING THE DATA BUS
DTGRT IS RECOGNIZED DATA TRANSFER STARTS, SUBSYSTEM SHOULD BE DRIVING THE DATA BUS
NOTES
1. LEGEND DON'T CARE DATA BUS UNDEFINED REPRESENTS THE SEQUENCE OF EVENTS IF THE COMMAND WAS BROADCAST. NOTE: NO STATUS WOULD BE TRANSMITTED ON1553 BUS. 2. EACH WORD IS DRIVEN FOR 18-19S ON D15-D0. IF BUF ENA IS ACTIVE THE LAST WORD IS AVAILABLE FOR 3.5-4S SINCE THE STATUS WORD MUST BE SUPPORTED. 3. DATA BUS IS SHOWN WITH BUF ENA CONNECTED TO DTACK (SEE PIN FUNCTION TABLE, PIN 67) 4. THE MAXIMUM RESPONSE TIME FROM DTREQ TO DTGRT TO GUARANTEE A SUCCESSFUL TRANSFER IS 2.1S FROM THE COMMAND WORD AND 9.35S FROM THE DATA TRANSFER FROM THE SUBSYSTEM. THE POSITION OF DTACK WILL VARY DEPENDING ON WHEN DGRT IS ISSUED. THE TIME WILL BE 100Ns MIN TO 150nS FROM DTREQ. 5. RTFAIL IS CLEARED WHEN THE STATUS WORD IS TRANSMITTED. ONCE SET, FLAG WILL REMAIN SET FOR THE ENTIRE MESSAGE. THE INCMD FALLING EDGE CAN BE USED TO LATCH RTFAIL STATUS. 6. 100nS MIN REPRESENTS SETUP TIME FOR VALID DATA BEFORE DTSTR GOES LOW FOR A WRITE CYCLE. A READ CYCLE REQUIRES VALID DATA 150nS MAX AFTER DTACK GOES LOW.
13
MODE CODES
The BUS-65142 implements all mode codes applicable to dualredundant systems. Mode codes can also be illegalized using the appropriate I/O signals. Mode command illegalization and handling are detailed below in TABLE 2.
TABLE 2. MODE CODES IMPLEMENTED DYNAMIC BUS CONTROL (00000) MESSAGE SEQUENCE = DBC * STATUS The RT responds with status. If the subsystem wants control of the bus, it must set DBACC in the Configuration Register. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No status response. Bits Set: message error (SW), High Word Count (BIT Word). 3. T/R bit Set to Zero. No status response. Bits set: message error (S/W), T/R Error (BIT Word). 4. Zero T/R bit and Broadcast Address. No status response. Bits Set: message error, broadcast received (S/W), Illegal Mode Code, T/R Error (BIT Word). 5. Broadcast Address. No status response. Bits Set: message error, broadcast received (S/W), Illegal Mode Code (BIT Word). SYNCHRONIZE WITHOUT DATA WORD (00001) MESSAGE SEQUENCE = SYNC * STATUS The RT responds with status. If sent as a broadcast, the broadcast receive bit will be set and status response suppressed. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No statue response. Bits Set: message error (SW), High Word Count (BIT Word) 3. T/R bit Set to Zero. No statue response. Bits set: message error (S/W), T/R Error (BIT Word). 4. Zero T/R bit and Broadcast Address. No statue response. Bits Set: message error, broadcast received (S/W), Illegal Mode Code, T/R Error (BIT Word). STATUS WORD (00010) MESSAGE SEQUENCE = TRANSMIT WORD * STATUS The status and BIT word registers are not altered by this command and contain the status from the previous command. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No statue response. Bits Set: message error (SW), High Word Count (BIT Word) 3. T/R bit Set to Zero. No statue response. Bits set: message error (S/W), T/R Error (BIT Word). 4. Zero T/R bit and Broadcast Address. No statue response. Bits Set: message error, broadcast received (S/W), Illegal Mode Code, T/R Error (BIT Word). 5. Broadcast Address. No statue response. Bits Set: message error, broadcast received (S/W), T/R Error (BIT Word). INITIATE SELF-TEST (00011) MESSAGE SEQUENCE = SELF TEST * STATUS The RT responds with a status word. If the command was broadcast, the broadcast received bit is set and status transmission suppressed. Short-loop test is initiated on the status word transmitted. If the test fails, an RT fail flag is set. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No statue response. Bits Set: message error (SW), High Word Count (BIT Word) 3. T/R bit Set to Zero. No statue response. Bits set: message error (S/W), T/R Error (BIT Word). 4. Zero T/R bit and Broadcast Address. No statue response. Bits Set: message error, broadcast received (S/W), T/R Error (BIT Word). 5. Faulty Test. Bits set: terminal flag (S/W), A / B Loop Test Fail, Current 1553 Bus (A or B) Loop Test Fail (BIT Word) TRANSMITTER SHUTDOWN (00100) MESSAGE SEQUENCE =SHUTDOWN * STATUS This command is only used with dual redundant bus systems. The RT responds with status. At the end of the status transmission, the RT inhibits any further transmission from the dual redundant channel. Once shutdown, the transmitter can only be reactivated by OVERRIDE TRANSMITTER SHUTDOWN or RESET RT commands. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No statue response. Bits Set: message error (SW), High Word Count (BIT Word) 3. T/R bit Set to Zero. No statue response. Bits set: message error (S/W), T/R Error (BIT Word). 4. Zero T/R bit and Broadcast Address. No statue response. Bits Set: message error, broadcast received (S/W), Illegal Mode Code, T/R Error (BIT Word). * = Status Response Time
14
TABLE 2. MODE CODES IMPLEMENTED (continued) OVERRIDE TRANSMITTER SHUTDOWN (00101) MESSAGE SEQUENCE = OVERRIDE SHUTDOWN * STATUS This command is only used with dual redundant bus systems. The RTU responds with status. At the end of the status transmission, the RTU reenables the transmitter of the redundant bus. If the command was broadcast, the broadcast received bit is set and status transmission is suppressed. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No statue response. Bits Set: message error (SW), High Word Count (BIT Word) 3. T/R bit Set to Zero. No statue response. Bits set: message error, broadcast received (S/W), T/R Error (BIT Word). 4. Zero T/R bit and Broadcast Address. No statue response. Bits Set: message error, broadcast received (S/W), Illegal Mode Code, T/R Error (BIT Word). INHIBIT TERMINAL FLAG BIT (00110) MESSAGE SEQUENCE = INHIBIT TERMINAL FLAG * STATUS The RTU responds with status and inhibits further internal or external setting of the terminal flag bit in the status register. Once the terminal flag has been inhibited, it can only be reactivated by an Override Inhibit Terminal Flag or Reset RT command. If the command was broadcast, the broadcast received bit is set and status transmission is suppressed. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No statue response. Bits Set: message error (SW), High Word Count (BIT Word) 3. T/R bit Set to Zero. No statue response. Bits set: message error (S/W), T/R Error (BIT Word). 4. Zero T/R bit and Broadcast Address. No statue response. Bits Set: message error, broadcast received (S/W), T/R Error (BIT Word). OVERRIDE INHIBIT TERMINAL FLAG BIT (00111) MESSAGE SEQUENCE = OVERRIDE INHIBIT TERMINAL FLAG * STATUS The RTU responds with status and reactivates the terminal flag bit in the status register. If the command was broadcast, the broadcast received bit is set and and status transmission is suppressed. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No statue response. Bits Set: message error (SW), High Word Count (BIT Word) 3. T/R bit Set to Zero. No statue response. Bits set: message error (S/W), T/R Error (BIT Word). 4. Zero T/R bit and Broadcast Address. No statue response. Bits Set: message error, broadcast received (S/W), T/R Error (BIT Word).
RESET REMOTE TERMINAL (01000) MESSAGE SEQUENCE = RESET REMOTE TERMINAL * STATUS The RTU responds with status and internally reseets. Transmitter shutdown, mode commands, BIT Word, and inhibit terminal flag commands will be reseet. If the command was broadcast, the broadcast received bit is set and the status word is suppressed. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No statue response. Bits Set: message error (SW), High Word Count (BIT Word). 3. T/R bit Set to Zero. No statue response. Bits Set: message error (S/W), T/R Error (BIT Word). 4. Zero T/R bit and Broadcast Address. No statue response.. Bits set: message error, broadcast received (S/W), T/R Error (BIT Word). RESERVED MODE COMMAND (01001-01111) MESSAGE SEQUENCE = RESERVED MODE COMMAND * STATUS The RTU responds with clear status and no data. If the command is illegalized through an optional PROM, the message error bit is set and only the ststus word is transmitted. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No statue response. Bits Set: message error (SW), High Word Count (BIT Word). 3. T/R bit Set to Zero. No statue response. Bits set: message error (S/W), Illegal Mode Code (BIT Word). 4. Zero T/R bit and Broadcast Address. No statue response. Bits Set: message error, broadcast received (S/W), Illegal Mode Code (BIT Word). * = Status Response Time
15
TABLE 2. MODE CODES IMPLEMENTED (continued) TRANSMIT VECTOR WORD (10000) MESSAGE SEQUENCE = TRANSMIT VECTOR WORD * STATUS VECTOR WORD The RTU transmits a status word followed by a vector word. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No status response. Bits Set: message error (SW), High Word Count (BIT Word) 3. T/R bit Set to Zero. No status response. Bits set: message error (S/W),Low Word Count (BIT Word). 4. Zero T/R bit and Broadcast Address. No status response. Bits Set: message error, broadcast received (S/W), Illegal Mode Code, T/R Error, Low Word Count (BIT Word). 5. Broadcast Address. No status response. Bits set: message error, broadcast received (S/W), Illegal Mode Code, (BIT Word). SYNCHRONIZE WITH DATA WORD (10001) MESSAGE SEQUENCE = SYNCHRONIZE WITH DATA WORD * STATUS The data word received fo;;owing the command word is transferred to RAM. The status word is then transmitted. If the command was broadcast, the broadcast received bit is set and status transmission is suppressed.. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Not Followed by Data Word. No status response. Bits Set: message error (SW), Low Word Count (BIT Word) 3. Command Followed by too many Data Words. No status response. Bits Set: message error (SW), High Word Count (BIT Word) 4. Command T/R bit Set to One. No status response. Bits set: message error (S/W), T/R Error, High Word Count (BIT Word). 5. Command T/R bit Set to Zero and Broadcast Address. No status response. Bits set: message error, broadcast received (S/W), High Word Count, T/R Erro (BIT Word). TRANSMIT LAST COMMAND (10010) MESSAGE SEQUENCE = TRANSMIT LAST COMMAND * STATUS The status and BIT word registers are not altered by this command. The SW contains the status from the previous command. The data word transmitted contains the prevous valid command (providing it was not another TRANSMIT LAST COMMAND). ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No status response. Bits Set: message error (SW) 3. T/R bit Set to Zero. No status response. Bits set: message error (S/W), T/R Error, Low Word Count (BIT Word). 4. Zero T/R bit and Broadcast Address. No status response. Bits Set: message error (S/W), Illegal Mode Code, T/R Error (BIT Word). 5. Broadcast Address. No status response. Bits Set: message error, broadcast received (S/W), Illegal Mode Code (BIT Word). TRANSMIT BIT WORD (10011) MESSAGE SEQUENCE = TRANSMIT BIT WORD * STATUS The RTU responds with status followed by the BIT word. The BIT word is not altered by this command; however, the next SW will reflect errors in this trnsmission. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No status response. Bits Set: message error (SW). 3. T/R bit Set to Zero. No status response. Bits Set: message error (S/W), T/R Error, Low Word Count (BIT Word). 4. Zero T/R bit and Broadcast Address. No status response.. Bits set: message error (S/W), Illegal Mode Code, T/R Error, Low Word Count (BIT Word). 5. Broadcast Address.No status response.. Bits set: message error, broadcast received (S/W), Illegal Mode Code (BIT Word) * = Status Response Time
16
TABLE 2. MODE CODES IMPLEMENTED (continued) SELECTED TRANSMITER SHUTDOWN (10100) MESSAGE SEQUENCE = SELECTED TRANSMITER SHUTDOWN * STATUS VECTOR WORD The data word received is transmitted to the subsystem and status is transmitted. No other action is taken by the RTU. If the command was broadcast, the broadcast received bit is set and status transmission suppressed. Intended for use with RT's with more than one dual redundant channel. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Not Followed by Data Word. No status response. Bits Set: message error (SW), High Word Count, Illegal Mode Code (BIT Word) 3. Command Followed by too many Data Word. No status response. Bits Set: message error (SW), Low Word Count, Illegal Mode Code (BIT Word) 4. Command T/R bit Set to One. No status response. Bits set: message error (S/W), Illegal Mode Code, High Word Count (BIT Word). 5. Command T/R bit Set to One and Broadcast Address. No status response. Bits Set: message error, broadcast received (S/W), Illegal Mode Code, High Word Count (BIT Word). OVVERRIDE SELECTED TRANSMITTER SHUTDOWN (10101) MESSAGE SEQUENCE = OVVERRIDE SELECTED TRANSMITTER SHUTDOWN * STATUS The data word received after the command is transferred to the subsystem. No other action is taken by the RTU. If the command was broadcast, the broadcast received bit is set and status transmission suppressed. ERROR CONDITIONS 1. Invalid Command. No response, command ignored. 2. Command Not Followed by Data Word. No status response. Bits Set: message error (SW), Low Word Count, Illegal Mode Code (BIT Word) 3. Command Followed by too many Data Words. No status response. Bits Set: message error (SW), High Word Count, Illegal Mode Code (BIT Word) 4. Command T/R bit Set to One. No status response. Bits set: message error (S/W), Illegal Mode Code, High Word Count (BIT Word). 5. Command T/R bit Set to One and Broadcast Address. No status response. Bits set: message error, broadcast received (S/W), Illegal Mode Code, High Word Count, T/R Erro (BIT Word). RESERVED MODE CODES (10110-11111) MESSAGE SEQUENCE = RESERVED MODE CODE (T/R = 1) * STATUS RESERVED MODE CODE (T/R = 0) * STATUS If Valid (T/R = 0) The RTU responds with status. If the command was broadcast, the broadcast received bit is set and status transmission is suppressed. If the command is illegalized through an optional PROM, the message error bit is set and only the status word is transmitted. If Valid (T/R = 1) Respond with status and one data word. ERROR CONDITIONS (T/R = 1) 1. Invalid Command. No response, command ignored. 2. Command Followed by Data Word. No status response. Bits Set: message error (SW), High Word Count, Illegal Mode Code (BIT Word). ERROR CONDITIONS (T/R = 0) 1. Invalid Command. No response, command ignored. 2. Command not followed by Contiguous Data Word. No status response. Bits set: message error (S/W), Low Word Count, Illegal Mode Code (BIT Word). 3. Command followed by to many Data Words. No status response. Bits Set: message error (S/W), High Word Count, Illegal Mode Code (BIT Word). UNDEFINED MODE CODES (T/R = 0, MODE CODES 00000 TO 01111) No Response, set message error bit. * = Status Response Time
17
PIN FUNCTION TABLE PACKAGE & PIN 788278Pin Pin Pin QIP Flat- FlatPack Pack 1 2 1 FUNCTION DESCRIPTION 78Pin QIP
PIN FUNCTION TABLE (continued) PACKAGE & PIN 8278- FUNCTION Pin Pin Flat- FlatPack Pack DESCRIPTION
A9 (SA4) A7 (SA2) A5 (SA0) DB1 DB3 DB5 DB7 DB9 DB11 DB13 DB15
Latched output of the most significant bit (MSB) in the subaddress field of the command word. Latched output of the third most significant bit in the subaddress field of the command word. Latched output of the least significant bit (LSB) in the subaddress field of the command word. Bi-directional parallel data bus Bit 1 Bi-directional parallel data bus Bit 3 Bi-directional parallel data bus Bit 5 Bi-directional parallel data bus Bit 7 Bi-directional parallel data bus Bit 9 Bi-directional parallel data bus Bit 11 Bi-directional parallel data bus Bit 13 Bi-directional parallel data bus Bit 15 (MSB) Broadcast enable - when HIGH, this input allows recognition of an RT address of all ones in the command word as a broadcast message. When LOW, it prevents response to RT address 31 unless it has the assigned terminal address. Input of the MSB of the assigned terminal address. Input of the 3rd MSB of the assigned terminal address. Input of the LSB of the assigned terminal address. Output signal used to inform subsystem of an address parity error. If LOW, indicates parity error and the RT will not respond to any command address to a single terminal. It will respond to broadcast commands if BRO ENA is HIGH. LOW output to the primary side of the coupling transformer that connects B channel of the 1553 bus. Power Supply return connection for the B channel transceiver. Input from the HIGH side of the primary side of the coupling transformer that connects to the B channel of the 1553 Bus. Multiplexed address line output. When INCMD is LOW or A5 thru A9 are all zeroes or all ones (Mode Command), it represents the latched output of the 2nd MSB in the word count field of the command word. When INCMD is HIGH and A5 thru A9 are not all zeroes or all ones, it represents the 2nd MSB of the current word counter. Multiplexed address line output. When INCMD is LOW or A5 thru A9 are all zeroes or all ones (Mode Command), it represents the latched output of the 2nd LSB in the word count field of the command word. When INCMD is HIGH and A5 thru A9 are not all zeroes or all ones, it represents the 2nd LSB of the current word counter.
23
77
74
DTGRT
2
4
3
Data transfer grant -- active LOW input signal from the subsystem that informs the RT, when DTREQ is asserted, to start the transfer. Once transfer is started, DTGRT can be removed. In-Command -- HIGH level output signal used to inform the subsystem that the RT is presently servicing a command. Handshake Fail-- output signal that goes LOW and stays LOW whenever the subsystem fails to supply DTGRT in time to do a successful transfer. Cleared by the next NBGT. A LOW level output pulse (166ns) present in the middle of every data word transfer over the parallel data bus. Used to latch or strobe the data into memory, FIFOs, registers, etc. Recommended using the rising edge to clock data in.
3 4 5 6 7 8 9 10 11
6 8 10 12 14 16 18 20 22
5 7 9 11 13 15 17 19 21
24
75
72
INCMD
25
73
70
HSFAIL
26
71
68
DTSTR
27
69
66
12
24
23
BRO ENA
Address line output that is LOW whenever the command word is being transferred to (DAT/CMD) the subsystem over the parallel data bus, and is HIGH whenever data words are being transfered. Remote Terminal Failure-- latched active LOW output signal to the subsystem to flag detection of a remote terminal continuous self-test failure. Also set if the Watchdog Timeout circuit is activated. Cleared by the start of the next message transmission (status word) and set if problem is again detected. Data Transfer Request --active LOW output signal to the subsystem indicating that the RT has data for or needs data from the subsystem and requests a data transfer over the parallel data bus. Will stay LOW until transfer is completed or transfer timeout has ocurred. Accept Dynamic Bus Control-- active LOW input signal from the subsystem used to set the Dynamic Bus Control Acceptance bit in the status register if the command word was a valid, legal mode command for dynamic bus control. Factory test point output-DO NOT USE (see note 1)* Latched output of the T/R bit in the command word. Illegal Command--active LOW input signal from the subsystem, strobed in on the rising edge of INCMD. Used to define the command word as illegal and to set the message error bit in the status register. Subsystem Service Request-- Input from the subsystem used to control the Service Request Bit in the status register. If LOW when the status word is updated, the Service Request Bit will be set; if HIGH, it will be cleared. Built-in-Test Word Enable--LOW level output pulse (.5s), present when the built-in-test word is enabled on the parallel data bus. Input from the LOW side of the primary
13 14 15
26 28 30
25 27 29
ADDRE (RTAD4) ADDRC (RTAD2) ADDRA (RTAD0)
28
67
64
RTFAIL
16
32
31
RTADERR
29
65
62
DTREQ
17 18 19 20
34 36 38 40
33 35 37 39
TXDATA B NC GND B RXDATA B
30
63
60
ADBC
31 32
61 59
58 56
TEST 2 A10 (T/R)
21
81
78
A3 (WC3/ CWC3)
33
57
54
ILLCMD
34
55
52
SS REQ
22
79
76
A1 (WC1/ CWC1)
35
53
50
BITEN
36
51
48
RXDATA A side of the coupling transformer that connects to the A channel of the 1553 Bus.
18
PIN FUNCTION TABLE (continued) PACKAGE & PIN 788278- FUNCTION DESCRIPTION Pin Pin Pin QIP Flat- FlatPack Pack -- 38 39 49 47 45 46 44 42 +5VA -VA TXDATA A
+5V input power supply connection for the A channel transceiver. -15V/-12V input power supply connection for the A Channel transceiver (Note 5). HIGH output to the primary side of the coupling transformer that connects to the A channel of the 1553 Bus. New Bus Grant -- LOW level output pulse (166ns) used to indicate the start of a new protocol sequence in response to the command word just received. Latched output of the 2nd MSB in the subaddress field of the command word. Latched output of the 2nd LSB in the subaddress field of the command word. Bi-directional parallel data bus Bit 0 (LSB) Bi-directional parallel data bus Bit 2 Bi-directional parallel data bus Bit 4 Bi-directional parallel data bus Bit 6 Bi-directional parallel data bus Bit 8 Bi-directional parallel data bus Bit 10 Bi-directional parallel data bus Bit 12 Bi-directional parallel data bus Bit 14 +5V input power supply connection for RTU digital logic section. Power supply return for RTU digital logic section. Input of the 2nd MSB of the assigned terminal address. Input of the 2nd LSB of the assigned terminal address. Input of Address Parity Bit. The combination of assigned terminal address and ADDRP must be odd parity for the RT to work. HIGH, output to the primary side of the coupling transformer that connects to the B channel transceiver. -15V/-12V input power supply connection for the B channel transceiver (Note 5). +5 V input power supply connection for the B channel transceiver. Input from the LOW side of the primary side of the coupling transformer that connects to the B channel of the 1553 Bus. Multiplexed address line output. When INCMD is LOW or A5 thru A9 are all zeroes or all ones (Mode Command), it represents the latched output of the 3rd MSB in the word count field of the command word. When INCMD is HIGH and A5 thru A9 are not all zeroes or all ones, it represents the 3rd MSB of the current word counter. Multiplexed address line output. When INCMD is LOW or A5 thru A9 are all zeroes or all ones (Mode Command), it represents the latched output of the LSB in the word count field of the command word. When INCMD is HIGH and A5 thru A9 are not all zeroes or all ones, it represents the LSB of the current word counter.
PIN FUNCTION TABLE (continued) PACKAGE & PIN 788278- FUNCTION DESCRIPTION Pin Pin Pin QIP Flat- FlatPack Pack
Data Transfer Acknowledge-- active LOW output signal during data transfers to or from the subsystem indicating the RTU has received the DTGRT in response to DTREQ and is presently doing the transfer. Can be connected directly to (BUF ENA) for control of tri-state data buffers; and to tri-state address buffer control lines, if they are used. Multiplexed address line output. When INCMD is LOW or A5 thru A9 are all zeroes or all ones (Mode Command), it represents the latched output of the MSB in the word count field of the command word. When INCMD is HIGH and A5 thru A9 are not all zeroes or all ones, it represents the MSB of the current word counter. Read/Write-- output signal that controls the direction of the internal data bus buffers. Normally, the signal is LOW and the buffers drive the data bus. When data is needed from the subsystem, it goes HIGH to turn the buffers around and the RT now appears as an input. The signal is HIGH only when DTREQ is active (LOW). Good Block Received--LOW level output pulse (.5s) used to flag the subsystem that a valid, legal, non-mode receive command with the correct number of data words has been received without a message error and successfully transferred to the subsystem. 16MHz Clock Input--input for the master clock used to run RTU circuits. Buffer Enable-- input used to enable or tri-state the internal data bus buffers when they are driving the bus. When LOW, the data bus buffers are enabled. Could be connected to DTACK, if RT is sharing the same data bus as the subsystem. (see note 2)*. Input resets entire RT when LOW. Remote Terminal Flag--Input signal used to control the terminal flag bit in the status register. If LOW when the status word is updated, the terminal flag bit would be set; if HIGH, it would be cleared. Normally connected to RTFAIL . Watchdog Timeout test point--DO NOT USE. (See note 3)* (input). Subsystem Busy-- input from the subsystem used to control the busy bit in the status register. If LOW when the status word is updated, the busy bit will be set, if HIGH it will be cleared. If the busy bit is set in the status register, no data will be requested from the subsystem in response to a transmit command. On receive commands, data will be transferred to the subsystem. Subsystem Flag-- input from the subsystem used to control the subsystem flag bit in the status register. If LOW when the status word is updated, the subsystem flag will be set; if HIGH it will be cleared.
62
76
73
DTACK
40
43
40
NBGT A8 (SA3) A6 (SA1) DB0 DB2 DB4 DB6 DB8 DB10 DB12 DB14 +5V GND ADDRD ADDRB ADDRP
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55
3 5 7 9
11
2 4 6 8
10
63
74
71
A4 (WC4/ CWC4)
13 15 17 19 21 23 25 27 29 31
12 14 16 18
20
64
72
69
RD/WR
22 24 26 28 30
65
70
67
GBR
66
68
65
16MHz IN
67
66
63
BUF ENA
56 -- 58 59
33 35 37 39
32 34 36 38
TXDATA B -VB +5VB RXDATA B
68
64
61
RESET
69
62
59
RTFLAG
70
60
57
TEST 1
60
80
77
A2 (WC2/ CSW2)
71
58
55
SSBUSY
61
78
75
A0 (WCO/ CSWO)
72
56
53
SSFLAG
19
PIN FUNCTION TABLE (continued) PACKAGE & PIN 78Pin QIP 8278Pin Pin Flat- FlatPack Pack FUNCTION DESCRIPTION
PIN FUNCTION TABLE NOTES: 1. TEST 2 This pin provides the output of the BUS-65142 BIT Comparison output. It indicates the loop test results for every word transmitted by the BUS-65142. A test can be performed by actioning the RTU to transmit while the test fixture opens the receiver lines to force an error condition. A logic 1 (high) indicates the loop test passed. Normally this pin is left open. 2. BUF ENA This pin is typically tied to DTACK, causing the BUS-65142 to drive the shared data bus only while DTACK is active. If desired BUF ENA can be grounded. The data will remain latched on the data bus pins for 18s from DTSRB and 3.5s for the last word of a message as the device's status word or BIT word is transferred to the BC ( STATEN or BITEN low). Once the STATUS or BIT Word transfer is complete, the data bus will automatically again contain the last data word. The BUS-65142 will automatically switch the direction of the internal buffers during a transmit operation. 3. TEST 1 This test allows the user to force the active channel to transmit indefinetly, in order to test the built in Watchdog Timer feature of the BUS-65142. When this pin is grounded and the active channel is stimulated with a valid transmit command, the BUS-65142 will respond with a status word and contiguous data (last data word loaded or STATUS WORD if none is loaded) until the built-in time out occurs. Normally this pin is left open or an optional pull-up can be used. 4. PINS 1, 41, 42, 82 for BUS-65144/45 82-pin Flat Pack, FIGURE 8 are not connected (N/C). 5. -VA and -VB are not connected (N/C) for BU-65142X3.
73
54
51
ME
Message Error--output signal that goes LOW and stays LOW whenever there is a format or word error with the received message over the 1553 Data Bus. Cleared by the next NGBT. Input from the HIGH side of the primary side of the coupling transformer that connects to the A channel of the 1553 Bus. Power supply return connection for the A channel transceiver. Not connected. Low output to the primary side of the coupling transformer that connects to the A channel of the 1553 Bus. Status Word Enable-- LOW level active output signal present when the status word is enabled on the parallel data bus. These pins are not used on this package.
74 75 76 77
52 50 48 46
49 47 45 43
RXDATA A GND A N/C TXDATA A
78
44 1,41, 42,82
41
STATEN
_
_
N/C
0.210 MAX (5.33)
2.100 MAX (53)
PIN NUMBERS FOR REFERENCE ONLY
40 78
21 60
1.500 (38)
1.800 MAX (46) 1.650 (42)
59 20
41 1
0.100 TYP (2.54) 0.050 TYP (1.27) SEE DETAIL "A" 1.800 (46) 1.900 (48) INDEX DENOTES PIN 1
2 0.018 0.002 DIA TYP (0.46 0.05) 0.250 0.010 (6.35 0.25)
DETAIL "A"
NOTE: DIMENSIONS ARE IN INCHES (MM).
FIGURE 7. BUS-65142/43 MECHANICAL OUTLINE (STANDARD PRODUCT) (78-PIN KOVAR QIP)
20
0.400 (MIN) (TYP) (10) 1
1.605 MAX (40.8) 82
2.195 MAX (55.8)
PIN1 DENOTED BY CONTRASTING COLORED BEAD
40 EQ.SP 0.050 2.000 (TOL NON-CUM) (1.27 50.8) PIN NUMBERS ARE FOR REF ONLY 0.015 0.003 (TYP) (0.38 0.076)
0.095 (REF) (2.413) 41 0.181 MAX (4.6) 0.080 (TYP) (2.032) TOP VIEW 42
0.010 0.002 (TYP) (0.254 0.051)
SIDE VIEW
Note: Dimensions are in inches (millimeters).
FIGURE 8. BUS-65144/45 MECHANICAL OUTLINE (STANDARD PRODUCT) (82-PIN KOVAR FLAT PACK)
0.210 MAX (5.33) PIN NUMBERS FOR REFERENCE ONLY
2.100 MAX (53)
40 78
21 60
1.500 (38)
1.800 MAX (46) 1.650 (42)
59 20
41 1
0.100 TYP (2.54) 0.050 TYP (1.27) SEE DETAIL "A" 1.800 (46) 1.900 (48) INDEX DENOTES PIN 1
2 0.018 0.002 DIA TYP (0.46 0.05) 0.250 0.010 (6.35 0.25)
DETAIL "A"
NOTE: DIMENSIONS ARE IN INCHES (MM).
FIGURE 9. BU-65142D MECHANICAL OUTLINE (HI-REL RADIATION TOLERANT VERSION (78-PIN CERAMIC QIP)
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PN 1 DENOTED BY INDEX TAB ON LEAD BRAZE
1.800 MAX (45.72)
0.400 MIN TYP (10.16)
78
1
2.100 MAX (53.34)
38 EQ. SP. @ 0.050 = 1.90 TOL NONCUM (1.27 = 48.26)
1
0.018 0.002 TYP (0.46 0.05) 0.050 (1.27) TYP
DETAIL "A"
39
40
PIN NUMBERS FOR REFERENCE ONLY
0.050 TYP (1.27)
SEE DETAIL "A"
NOTES: 1 LEAD CLUSTER TO BE CENTRALIZED ABOUT CASE CENTER LINE WITHIN 0.010. 2. DIMENSIONS ARE IN INCHES (MM).
0.100 0.010 TYP (2.54 0.25) 0.210 MAX (5.33) 1.824 MAX (46.32) 0.010 (0.254) 0.010 0.002 TYP (0.25 0.05)
FIGURE 10. BU-65142F MECHANICAL OUTLINE (HI-REL / RADIATION TOLERANT VERSION) (78-PIN CERAMIC FLAT PACK)
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ORDERING INFORMATION
BU-65142D1- 110X Supplemental Process Requirements: S = Pre-Cap Source Inspection L = Pull Test Q = Pull Test and Pre-Cap Inspection K = One Lot Date Code W = One Lot Date Code and PreCap Source Y = One Lot Date Code and 100% Pull Test Z = One Lot Date Code, PreCap Source and 100% Pull Test Blank = None of the Above Test Criteria: 0 = None Process Requirements: 0 = Standard DDC Processing, no Burn-In (See page xiii.) 1 = MIL-PRF-38534 Compliant 2 = B* 3 = MIL-PRF-38534 Compliant with PIND Testing 4 = MIL-PRF-38534 Compliant with Solder Dip 5 = MIL-PRF-38534 Compliant with PIND Testing and Solder Dip 6 = B* with PIND Testing 7 = B* with Solder Dip 8 = B* with PIND Testing and Solder Dip 9 = Standard DDC Processing with Solder Dip, no Burn-In Temperature Grade/Data Requirements: 1 = -55C to +125C 2 = -40C to +85C 3 = 0C to +70C 4 = -55C to +125C with Variables Test Data 5 = -40C to +85C with Variables Test Data 8 = 0C to +70C with Variables Test Data Transceiver Option: 1 =+15 Volts and - 15 Volts 2 =+5 Volts and - 12 Volts Package Options: D = 78-pin QIP Package (See Figure 9) F = 78-pin Flatpack (See Figure 10) Product Type: BU-65142 = Radiation Tolerant Remote Terminal
ORDERING INFORMATION
BUS-6514X- XX0X Supplemental Process Requirements: S = Pre-Cap Source Inspection L = Pull Test Q = Pull Test and Pre-Cap Inspection K = One Lot Date Code W = One Lot Date Code and PreCap Source Y = One Lot Date Code and 100% Pull Test Z = One Lot Date Code, PreCap Source and 100% Pull Test Blank = None of the Above Test Criteria: 0 = None Process Requirements: 0 = Standard DDC Processing, no Burn-In (See page xiii.) 1 = MIL-PRF-38534 Compliant 2 = B* 3 = MIL-PRF-38534 Compliant with PIND Testing 4 = MIL-PRF-38534 Compliant with Solder Dip 5 = MIL-PRF-38534 Compliant with PIND Testing and Solder Dip 6 = B* with PIND Testing 7 = B* with Solder Dip 8 = B* with PIND Testing and Solder Dip 9 = Standard DDC Processing with Solder Dip, no Burn-In Temperature Grade/Data Requirements: 1 = -55C to +125C 2 = -40C to +85C 3 = 0C to +70C 4 = -55C to +125C with Variables Test Data 5 = -40C to +85C with Variables Test Data 8 = 0C to +70C with Variables Test Data Power Supply and Packaging 2 = -15 V 78-pin QIP (See Figure 7) 3 = -12 V 78-pin QIP (See Figure 7) 4 = -15 V 82-pin Flat Pack (See Figure 8) 5 = -12 V 82-pin Flat Pack (See Figure 8)
* Standard DDC Processing with burn-in and full temperature test: see table below. Mating Transformer: BUS-25679 is for the BUS-65142, and BU-65142X1. BUS-29854 is for the BUS-65143, and BU-65142X2.
STANDARD DDC PROCESSING MIL-STD-883 METHOD(S) 2009, 2010, 2017, and 2032 1014 1010 2001 1015, Table 1 CONDITION(S) -- A and C C A --
TEST INSPECTION SEAL TEMPERATURE CYCLE CONSTANT ACCELERATION BURN-IN
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The information in this data sheet is believed to be accurate; however, no responsibility is assumed by Data Device Corporation for its use, and no license or rights are granted by implication or otherwise in connection therewith. Specifications are subject to change without notice.
105 Wilbur Place, Bohemia, New York 11716-2482 For Technical Support - 1-800-DDC-5757 ext. 7257 or 7381 Headquarters - Tel: (631) 567-5600 ext. 7257 or 7381, Fax: (631) 567-7358 Southeast - Tel: (703) 450-7900, Fax: (703) 450-6610 West Coast - Tel: (714) 895-9777, Fax: (714) 895-4988 Europe - Tel: +44-(0)1635-811140, Fax: +44-(0)1635-32264 Asia/Pacific - Tel: +81-(0)3-3814-7688, Fax: +81-(0)3-3814-7689 World Wide Web - http://www.ddc-web.com
ILC DATA DEVICE CORPORATION REGISTERED TO ISO 9001 FILE NO. A5976
N--10/99
PRINTED IN THE U.S.A
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